let get_edge_labels e =
let v_after = edge_dst e in
let l = match !v_after.kind with
| Vstart -> assert false
| VfctIn -> []
| Vexit | VfctOut -> [Logic_const.post_label]
| VblkIn (Bstmt s, _) -> [mk_logic_label s]
| Vtest (false, _, _) | VblkIn _ | VblkOut _ | Vend -> []
| VcallOut _ | VcallExit _ -> []
| VcallIn _ | Vstmt _ | Vtest (true, _, _) | Vswitch _ ->
[mk_logic_label (node_stmt_exn v_after)]
| Vloop _ ->
if is_back_edge e then [] else [mk_logic_label (node_stmt_exn v_after)]
in
let v_before = edge_src e in
match !v_before.kind with
| VfctIn -> Logic_const.pre_label::l
| Vloop (_, s) -> (loop_head_label s)::l
| _ -> l